Kavli Affiliate: Alyosha Molnar
| First 5 Authors: Stuart Daudlin, Anthony Rizzo, Sunwoo Lee, Devesh Khilwani, Christine Ou
| Summary:
Artificial intelligence (AI) hardware is positioned to unlock revolutionary
computational abilities across diverse fields ranging from fundamental science
[1] to medicine [2] and environmental science [3] by leveraging advanced
semiconductor chips interconnected in vast distributed networks. However, AI
chip development has far outpaced that of the networks that connect them, as
chip computation speeds have accelerated a thousandfold faster than
communication bandwidth over the last two decades [4, 5]. This gap is the
largest barrier for scaling AI performance [6, 7] and results from the
disproportionately high energy expended to transmit data [8], which is two
orders of magnitude more intensive than computing [9]. Here, we show a leveling
of this long-standing discrepancy and achieve the lowest energy optical data
link to date through dense 3D integration of photonic and electronic chips. At
120 fJ of consumed energy per communicated bit and 5.3 Tb/s bandwidth per
square millimeter of chip area, our platform simultaneously achieves a twofold
improvement in both energy consumption and bandwidth density relative to prior
demonstrations [10, 11]. These improvements are realized through employing
massively parallel 80 channel microresonator-based transmitter and receiver
arrays operating at 10 Gb/s per channel, occupying a combined chip footprint of
only 0.32 mm2. Furthermore, commercial complementary metal-oxide-semiconductor
(CMOS) foundries fabricate both the electronic and photonic chips on 300 mm
wafers, providing a clear avenue to volume scaling. Through these demonstrated
ultra-energy efficient, high bandwidth data communication links, this work
eliminates the bandwidth bottleneck between spatially distanced compute nodes
and will enable a fundamentally new scale of future AI computing hardware
without constraints on data locality.
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