Versatile silicon integrated photonic processor: a reconfigurable solution for netx-generation AI clusters

Kavli Affiliate: Jia Liu

| First 5 Authors: Ying Zhu, Yifan Liu, Xinyu Yang, Kailai Liu, Xin Hua

| Summary:

The Artificial Intelligence models pose serious challenges in intensive
computing and high-bandwidth communication for conventional electronic
circuit-based computing clusters. Silicon photonic technologies, owing to their
high speed, low latency, large bandwidth, and complementary
metal-oxide-semiconductor compatibility, have been widely implemented for data
transfer and actively explored as photonic neural networks in AI clusters.
However, current silicon photonic integrated chips lack adaptability for
multifuncional use and hardware-software systematic coordination. Here, we
develop a reconfigurable silicon photonic processor with $40$ programmable unit
cells integrating over $160$ component, which, to the best of our knowledge, is
the first to realize diverse functions with a chip for AI clusters, from
computing acceleration and signal processing to network swtiching and secure
encryption. Through a self-developed automated testing, compilation, and tuning
framework to the processor without in-network monitoring photodetectors, we
implement $4times4$ dual-direction unitary and $3times3$ uni-direction
non-unitary matrix multiplications, neural networks for image recognition,
micro-ring modulator wavelength locking, $4times4$ photonic channel switching
, and silicon photonic physical unclonable functions. This optoelectronic
processing system, incorporating the photonic processor and its software stack,
paves the way for both advanced photonic system-on-chip design and the
construction of photo-electronic AI clusters.

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